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The design warrior's guide to FPGAs : devices, tools and flows / Clive "Max" Maxfield.

By: Material type: TextTextPublication details: Amsterdam : Newnes/Elsevier, c2004.Description: xvi, 542 p. : ill. ; 24 cm. + 1 cédérom (12 cm.)ISBN:
  • 0750676043
  • 9780750676045
Subject(s): Genre/Form: DDC classification:
  • 621.39
LOC classification:
  • TK 7895 M463d 2004
Online resources:
Contents:
Ch. 1. Introduction -- Ch. 2. Fundamental concepts -- Ch. 3. The origin of FPGAs -- Ch. 4. Alternative FPGA architectures -- Ch. 5. Programming (configuring) an FPGA -- Ch. 6. Who are all the players? -- Ch. 7. FPGA versus ASIC design styles -- Ch. 8. Schematic-based design flows -- Ch. 9. HDL-based design flows -- Ch. 10. Silicon virtual prototyping for FPGAs -- Ch. 11. C/C++ etc.-based design flows -- Ch. 12. DSP-based design flows -- Ch. 13. Embedded processor-based design flows -- Ch. 14. Modular and incremental design -- Ch. 15. High-speed design and other PCB considerations -- Ch. 16. Observing internal nodes in an FPGA -- Ch. 17. Intellectual property -- Ch. 18. Migrating ASIC designs to FPGAs and vice versa -- Ch. 19. Simulation, synthesis, verification, etc. design tools -- Ch. 20. Choosing the right device -- Ch. 21. Gigabit transceivers -- Ch. 22. Reconfigurable computing -- Ch. 23. Field-programmable node arrays -- Ch. 24. Independent design tools -- Ch. 25. Creating an open-source-based design flow -- Ch. 26. Future FPGA developments -- App. A. Signal integrity 101 -- App. B. Deep-submicron delay effects 101 -- App. C. Linear feedback shift registers 101.
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Holdings
Item type Current library Home library Collection Shelving location Call number Copy number Status Date due Barcode
Libro Libro Biblioteca Juan Bosch Biblioteca Juan Bosch Colección de Tecnología Humanidades (4to. Piso) TK 7895 M463d 2004 (Browse shelf(Opens below)) 1 Available 00000092721

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Ch. 1. Introduction -- Ch. 2. Fundamental concepts -- Ch. 3. The origin of FPGAs -- Ch. 4. Alternative FPGA architectures -- Ch. 5. Programming (configuring) an FPGA -- Ch. 6. Who are all the players? -- Ch. 7. FPGA versus ASIC design styles -- Ch. 8. Schematic-based design flows -- Ch. 9. HDL-based design flows -- Ch. 10. Silicon virtual prototyping for FPGAs -- Ch. 11. C/C++ etc.-based design flows -- Ch. 12. DSP-based design flows -- Ch. 13. Embedded processor-based design flows -- Ch. 14. Modular and incremental design -- Ch. 15. High-speed design and other PCB considerations -- Ch. 16. Observing internal nodes in an FPGA -- Ch. 17. Intellectual property -- Ch. 18. Migrating ASIC designs to FPGAs and vice versa -- Ch. 19. Simulation, synthesis, verification, etc. design tools -- Ch. 20. Choosing the right device -- Ch. 21. Gigabit transceivers -- Ch. 22. Reconfigurable computing -- Ch. 23. Field-programmable node arrays -- Ch. 24. Independent design tools -- Ch. 25. Creating an open-source-based design flow -- Ch. 26. Future FPGA developments -- App. A. Signal integrity 101 -- App. B. Deep-submicron delay effects 101 -- App. C. Linear feedback shift registers 101.

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